Field of the Invention
The present invention relates to thin film transistor devices and methods for producing thereof, and more particularly to a thin film transistor device and a method for producing thereof suitable for a transistor used a poly-crystalline silicon (poly-Si).
The thin film transistor devices are utilized mainly for an image display device of a liquid crystal display device (LCD), a plasma display device (PDP) and the like as pixels or thin film transistors (TFT) for driving a peripheral circuit.
Mainly, high-temperature poly-crystalline Si has been used for a base thin film employed for forming a conventional thin film transistor. This means that a poly-crystalline Si (poly Si) thin film is formed on a quartz substrate being an insulator substrate by a high-temperature heat treatment at temperature of below or above 900xc2x0 C., and that the poly-crystalline Si of comparatively large grain size (for example, 500-600 nm) is formed.
A TFT formed on the high-temperature poly-crystalline Si (hereinafter, referred to as high-temperature poly-Si) thin film utilizes a Si thin film having a low density in a grain boundary of crystal and excellent crystallinity, as a channel, so that field effect mobility of 100-150 [cm2/Vs], as a value close to that conventional type Si-LSi on a Si substrate having (xcx9c500 [cm2/Vs], refer to a document, S. M. Sze, Physics of Semiconductor Devices, p. 29, Second Edition, Wiley), can be obtained.
However, the highxe2x80x94temperature poly-Si is necessitated to use the expensive quartz substrate as the insulator substrate capable of withstanding through a high temperature process, since this cost of the substrate has been the main cause of difficulty in a cost reduction of an entire semiconductor device, generalization of use of a TFT has been restricted.
In recent years, in place of the high-temperature poly-Si, a research on low-temperature poly-crystalline Si (hereinafter, referred to as low-temperature poly-Si) has vigorously been carried out. This is the poly-crystalline Si crystallized amorphous Si formed on a low cost glass substrate or a plastic substrate by a plasma CVD method or the like utilizing a zone melting re-crystallization method such as excimer laser annealing. With the use of this method, since the poly-crystalline Si thin film is capable of being formed at low-temperature (xcx9c150xc2x0 C.), there is an advantage that a remarkably inexpensive TFT can be formed.
However, the low-temperature poly-Si up to now is small (xcx9c100 nm) in crystal grain size compared with that of the high-temperature poly-Si and the poly-crystalline Si only with large (xcx9c50 nm) surface roughness has been formed.
When crystal grain size is small, there are such drawbacks that a density in the grain boundary of crystal existing in a current path becomes large, and current mobility is lowered through current scattering in the grain boundary thereof.
Further, when the surface roughness is large, a requirement for thickening (xcx9c100 nm) a gate insulation film to that amount is generated in order to restrain a gate leak current, consequently, since the carrier number induced to the channel by the same gate voltage becomes small, the current mobility is also lowered.
From that reason, in a TFT of a product base utilizing conventional low-temperature poly-Si as an elemental material, the field effect mobility thereof is restrained to a degree of up to 150 [cm2/Vs] in case of an electron carrier, is restrained to a degree of up to 50 [cm2/Vs] in case of positive hole carrier. With a small mobility like this, since elemental performance cannot reach the required elemental performance, there is such a drawback as that sorts of the elements capable of being formed on the same glass (or plastic) substrate are restricted.
For example, in the case of the image display device, a pixel circuit part which is comparatively low in required performance, can be formed on glass (or plastic), whereas the other circuits which are high in the required performances such as a source driver, a gate driver, a shift register, and a peripheral controller, since they cannot be formed on the same substrate, they are integrated on a printed circuit board as semi-conductor chips utilized a conventional Si-LSI art, this printed circuit board is connected with the glass substrate and must be used.
With such a method, there has been drawbacks as that in addition to small dimensioning (4 in.-10 in.) in screen size depending upon a dimension where the periphery circuit part is mounted, a remarkable increase in cost of the entire image display device are brought about. Further, in a power saving image display device, which is promising for a future market, a TFT is indispensable to conduct CMOS (complementary MOS) forming, for that purpose, the requirement for a further increase in performance with respect to the field effect mobility of a positive hole carrier is estimated.
In order to improve these drawbacks, the art to achieve enhancement in performance of a TFT into high level is necessitated by realizing such a poly-crystalline thin film as that current scattering in the grain boundary being restrained, and the surface roughness thereof being lessened. In order to high-function the low-temperature poly-Si, various arts have been proposed as exemplified hereinafter.
Among them, for example, an art (for example, Japanese Unexamined Patent Publication H7-321339) for forming poly-crystalline Si having an [111] axis in a current moving direction, by introducing a metal element for selectively promoting an amorphous Si film formed on the insulator substrate into crystallization and by carrying out respective crystal growth in a direction parallel to a substrate; an art (for example, Japanese Unexamined Patent Publication H10-41234) for forming rectangular poly-crystalline Si having a  less than 100 greater than  axis in a direction perpendicular to the substrate, and a {220} surface in parallel (or at an angle of 45xc2x0) to a beam scanning direction by accurately controlling a shape of a laser beam for annealing and a scanning rate of a laser annealing position; and an art (for example, Japanese Unexamined Patent Publication H8-55808) for forming columnar poly-crystalline Si layers by forming a first poly-crystalline Si layer on the substrate, by forming a seed crystal having either of typical orientations ({100}, {110}, and {111}) by an-isotropic etching and by forming a second poly-crystalline Si layer thereon and the like.
However, in spite of these numerous trials, a TFT with sufficiently high mobility so far has not been realized.
All of conventional crystallization methods of a low-temperature poly-Si thin film cannot be said as sufficiently completed arts, for example, when either of the maximum grain size, or surface roughness is taken up, performance of a TFT has not been, as yet, met demand required for a peripheral circuit integrated type liquid crystal display panel. So that these arts cannot sufficiently replace an existing thin film transistor device of low function. Accordingly, a technical theme to realize an image display device having the high performance and a large area with low cost is extremely important.
Thus, a first object of the present invention is, in low-temperature poly-Si being a elemental material of a TFT, to provide a thin film transistor device excellent in characteristics in which a conventional art cannot provide by restraining current scattering in the grain boundary of crystal, by decreasing the surface roughness, and by realizing a poly-crystalline thin film having a crystal structure so as to realize high mobility even for a positive carrier, a second object is to provide a production method by which a thin film transistor device can be easily obtained, a third object is to provide an image display device utilized the thin film transistor device.
In order to achieve the objects described above and as a result of various experiments and investigations about low-temperature poly-Si for forming a TFT, the inventors have obtained an important knowledge being capable of realizing the TFT with high mobility, by introducing Ge into a poly-Si thin film, by differentiating (for further details, a ratio of Ge composition in a grain boundary of crystal is made larger than a portion where a ratio of Ge composition in an interior grain is the minimum) a ratio of Ge composition between a crystal interior grain and the grain boundary by a phase separation involved in crystallization, by restraining a current scattering factor in a grain boundary, and by restraining surface roughness utilizing a difference of volumes of a crystal.
The present invention has been carried out based on these knowledge and the first object described above can be achieved by a thin film transistor device including an insulator substrate, a poly-crystalline thin film formed on the insulator substrate, and a transistor composed of a source, a drain, a channel, and a gate, formed on the poly-crystalline thin film, wherein the poly-crystalline thin film in a channel part of the transistor is composed of a silicon germanium poly-crystal Si1-xGex, however, a ratio x of a Ge composition relative to Si is 0 less than x less than 1, and a ratio x of a Ge composition in the poly-crystalline thin film is larger in a grain boundary than a portion where a Ge composition in an interior grain of crystal becomes the minimum.
Further, preferably, a thickness of the poly-crystalline thin film is 10-100 nm, a ratio x of a Ge composition in a central part of a crystal grain constituting the poly-crystalline thin film is 0 less than xxe2x89xa60.3, a ratio x of a Ge composition in a grain boundary is 0.1 less than xxe2x89xa61.0, the ratio x of the Ge composition described above is invariably larger in a grain boundary than a portion where a Ge composition in an interior grain becomes the minimum.
Further preferable points of characteristics of a thin film transistor device will be enumerated hereinafter.
In the thin film transistor device described above, a poly-crystalline Si1-xGex thin film is characterized in that surface roughness in a grain boundary is equal to or less than 30 nm.
In the thin film transistor device described above, a main current carried in a channel part of the transistor is characterized by being a positive hole.
The thin film transistor device described above has an insulator substrate, a poly-crystalline thin film formed on the insulator substrate, and a transistor composed of a source, a drain, a channel, and a gate, and the poly-crystalline thin film in a channel part of the transistor described above is characterized by having a {110}-oriented crystal grain in parallel with the substrate and is characterized in that an average lattice constant in a grain boundary is larger than an average lattice constant in an interior grain part of crystal.
The thin film transistor device described above is characterized by retaining the insulator substrate, a poly-crystalline Si1-xGex thin film formed on the insulator substrate, however, a ratio x of a Ge composition relative to Si is 0 less than x less than 1, and a circuit part constituted by integrating a plurality of transistors composed of sources, drains, channels, and gates formed on the poly-crystalline Si1-xGex thin film and is characterized in that the circuit part described above includes a CMOS type transistor making present as a mixture of both of a p type transistor and an n type transistor.
Further, the thin film transistor device described above is characterized in that a ratio x of a Ge composition of the p type transistor constituting the circuit part is larger than a ratio of a Ge composition of the n type transistor.
The second object described above is achieved by a method for producing a thin film transistor device characterized by having a step for forming an amorphous Si1-xGex layer of a film thickness of 10-100 nm, however, a ratio x of a Ge composition relative to Si is 0 less than x less than 1 and an annealing step for crystallizing the amorphous Si1-xGex layer described above by means of an excimer laser having an energy density of 200-300 mJ/cm2, and the pulse numbers are 1-50 shots.
Further, preferably, in the method for producing a thin film transistor device, the annealing step described above is characterized by varying an energy density as (180+T)xcx9c(200+T) mJ/cm2 corresponding to a film thickness when the film thickness of the amorphous Si1-xGex layer described above is set T nm.
The third object described above is achieved by an image display device, wherein the image display device has an image display part, an image display circuit controlling a display of the image display part and including at least a data driver, a gate driver, and a buffer amplifier, and a peripheral circuit part positioned in the neighborhood of the image display circuit and controlling the image display circuit described above, and is characterized in that the image display circuit and the peripheral circuit part described above are integrated on the same substrate as the substrate constituting the image display device described above, the image display circuit and the peripheral circuit part described above further retains an insulator substrate, a poly-crystalline Si1-xGex thin film formed on the insulator substrate, however, a ratio x of a Ge composition relative to Si is 0 less than x less than 1, and a circuit part constituted by integrating a plurality of transistors composed of sources, drains, channels, and gates formed on the poly-crystalline Si1-xGex thin film, and the circuit part described above includes a CMOS type transistor making present as a mixture of either one or both of a p type transistor or/and an n type transistor.
Further, preferably, the image display device described above is characterized in that a ratio x of a Ge composition of a p type transistor is larger than a ratio of a Ge composition of an n type transistor.
Furthermore preferably, it is characterized in that the circuit part described above retains positioning marks provided in the neighborhood of these circuits in order to differentiate whichever sorts of the p type transistor, n type transistor, and the CMOS type transistor.
As explained above, according to the present invention, a high mobility TFT is realized by restraining a current scattering factor in a grain boundary of crystal with an introduction of Ge into Si and a differential of ratios of Ge compositions between an interior grain and a grain boundary of crystal resulted from a phase separation accompanied with crystallization, and by restraining surface roughness with the use of a difference in volumes of a crystal. As a result, large area (for example, equal to or more than 15 inches) image display devices can be highly integrated, since pixel matrices and peripheral circuits are capable of being intensively formed on the same glass substrate.